If your doorbell, hearing aid, or little farm sensor wanted to run serious AI without dragging around a power plant in its backpack, this paper says that idea is getting less ridiculous by the week.

The paper is a 2026 Nature Materials review on memristor-based analogue computing in memory, or CIM for short [1]. The pitch is simple. Stop hauling data back and forth between memory and processor like an exhausted intern running printouts across the office. Put the math where the memory already lives.

That matters because modern AI spends a shocking amount of time and energy moving numbers around. Not thinking. Not "reasoning." Just commuting. In-memory computing attacks that problem head-on.

Tiny Resistors, Big Ambitions

A memristor is a device whose resistance depends on its history. In plain English, it remembers. That makes it useful for storing neural network weights, which are really just lots of adjustable numbers with trust issues.

In memristor crossbar arrays, engineers can use Ohm's law and Kirchhoff's law to do matrix multiplications directly inside the memory array. That is the core trick. Neural networks love matrix multiplications the way raccoons love unsecured trash.

So why isn't everyone already doing this?

Because analogue computing is messy.

Digital bits are neat little tyrants. A 0 is a 0. A 1 is a 1. Analogue values are squishier. Noise, drift, device variation, parasitic resistance, write errors, read errors, temperature effects - the whole hardware gremlin parade shows up [1]. Memristor CIM can be wildly efficient, but accuracy has often been the tax collector waiting at the end of the road.

That tradeoff is the real subject of this review.

The Villain Is Not One Villain

Jiang and colleagues map the error sources across the whole stack: device, array, circuit, architecture, and algorithm [1]. That framing is useful because it kills a common fantasy in AI hardware, namely: "surely one clever material tweak will fix everything."

Nope.

You can improve the device. Great. Then interconnect parasitics bite you. You can calibrate the array. Nice. Then the ADC overhead starts eating your energy savings. You can add error correction. Cool. Now your elegant analogue accelerator is wearing so much digital armor it starts looking like a regular chip with commitment issues.

The review walks through three broad response strategies.

First, better materials and devices. A 2023 Nature paper showed memristors monolithically integrated on CMOS with 2,048 conductance levels, which is the sort of sentence hardware people read with the same expression the rest of us reserve for house prices [2]. More stable, fine-grained conductance states help analogue precision a lot.

Second, array- and circuit-level fixes. These include smarter programming schemes, compensation for sneak paths and parasitics, and readout designs that reduce accumulated error [1].

Third, algorithm-architecture co-design. This is where hardware people and ML people finally stop throwing passive-aggressive PDFs at each other. The model, training recipe, mapping strategy, and hardware all get tuned together. A 2024 Nature Communications paper showed more robust analogue in-memory training by redesigning how updates happen on noisy analogue hardware [3].

Accuracy Without Killing the Point

This is the tightrope.

If you pile on enough correction circuitry, calibration, and data conversion, you can rescue accuracy. You can also rescue your power bill from being too low, which would be a strange flex. The review keeps returning to this tension: high accuracy is only useful if the fix does not erase the efficiency that made analogue CIM attractive in the first place [1].

That is why hybrid ideas are getting attention. A 2025 Nature paper described a mixed-precision processor that splits work across memristor CIM, SRAM-CIM, and digital units depending on how error-sensitive each part is [4]. That is less romantic than "pure analogue everything," but much more likely to survive contact with reality.

Which, honestly, is how good engineering usually works. Fewer manifestos. More compromise.

Why You Should Care, Even If You Do Not Own a Semiconductor Fab

This line of research points toward AI that can run closer to where data is created: sensors, phones, medical wearables, edge devices, maybe one day all the gadgets in your house that currently need a cloud server to decide whether a cat walked by.

That could mean lower latency, less energy use, and less dependence on giant data centers for every small decision. It also fits the broader scramble to make AI hardware less power-hungry at a time when "just add more GPUs" is starting to sound like a dare, not a plan.

Industry is already circling the idea. In 2025, EnCharge AI announced an analog in-memory accelerator, a sign that this has moved beyond lab-demo theater and into early commercialization [5]. On the research side, IBM's open-source AIHWKit gives people a way to simulate analogue hardware behavior before spending real money on silicon, which is nice because wafers are less forgiving than Jupyter notebooks [6].

One funny twist here: not all noise is bad. A 2025 review in Communications Materials argues that some memristor noise can actually be useful for things like stochastic computing and reservoir computing [7]. Sometimes the gremlin is also a coworker.

The Bottom Line

This review does not claim memristor analogue CIM is ready to bulldoze digital computing tomorrow. Good. That would be marketing, not science.

What it does say is more interesting. The path to practical analogue AI hardware is getting clearer. Not because one miracle device appeared. Because researchers are finally treating the problem like a stack, not a single component.

That is less cinematic.

It is also how things usually start working.

References

[1] Jiang, Z., Zhao, H., Tang, J. et al. Strategies of high-accuracy memristor-based analogue computing in memory for artificial intelligence. Nature Materials (2026). DOI: 10.1038/s41563-026-02600-y. PubMed: PMID 42115778

[2] Yang, R. et al. Thousands of conductance levels in memristors integrated on CMOS. Nature 615, 823-829 (2023). DOI: 10.1038/s41586-023-05759-5

[3] Rasch, M.J., Carta, F., Fagbohungbe, O. et al. Fast and robust analog in-memory deep neural network training. Nature Communications 15, 7133 (2024). DOI: 10.1038/s41467-024-51221-z

[4] Khwa, W.S., Wen, T.H., Hsu, H.H. et al. A mixed-precision memristor and SRAM compute-in-memory AI processor. Nature 639, 617-623 (2025). DOI: 10.1038/s41586-025-08639-2

[5] EnCharge AI. EnCharge AI unveils EN100 AI accelerator built on analog in-memory computing (May 29, 2025). https://gamesbeat.com/encharge-ai-unveils-en100-ai-accelerator-chip-with-analog-memory/

[6] IBM Research. IBM Analog Hardware Acceleration Kit. Open-source toolkit and project page. https://github.com/IBM/aihwkit and https://research.ibm.com/publications/ibm-analog-hardware-acceleration-kit

[7] Ding, C., Ren, Y., Liu, Z. et al. Transforming memristor noises into computational innovations. Communications Materials 6, 149 (2025). DOI: 10.1038/s43246-025-00876-2

Disclaimer: This blog post is a simplified summary of published research for educational purposes. The accompanying illustration is artistic and does not depict actual model architectures, data, or experimental results. Always refer to the original paper for technical details.